1. Technical Field
The present disclosure represents a method and apparatus that enable the robust bond-pad charging protection for transistor test structures including reference and non-reference ones for charging- and non-charging-monitoring applications.
2. Description of Related Art
Transistor test structures are indispensable in monitoring the health of transistors during the integrated-circuit (IC) process technology development. However, the size of bond pads required in these test transistors for the measurement purpose is usually quite large, easily introducing strong process-related charging effect to degrade the transistor characteristics during the back-end (BE) IC manufacturing process. The process-related charging effect could lead to the characteristics of transistor test structures being quite different from those of the transistors in circuits. This is particularly true for thick gate-oxide test transistors operating at medium to high chip operation supply voltages in the I/O portion of the circuits. These transistors have gate oxide thickness typically ranging from 40 to 150 Å in order to sustain the higher voltages during the operation of the chips. They however are more vulnerable to the charging damage during the plasma-involved BE IC manufacturing process compared to their thin gate-oxide counterparts operating at the low chip operation supply voltages.
Bond-pad charging protection on transistors must be considered during design of transistor test structures to ensure that the transistor characteristics to be monitored may not suffer from bond-pad induced charging signals due to plasma-involved process charging effect.
The considerations for the bond-pad charging protection on charging- and non-charging-monitoring transistor test structures are different. The conventional method generally provides the protection at the transistor gate terminal though such method has been proved inadequate in certain applications.